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PD - 94797
AUTOMOTIVE MOSFET
Features
Advanced Process Technology Ultra Low On-Resistance Dynamic dv/dt Rating 175C Operating Temperature Fast Switching Repetitive Avalanche Allowed up to Tjmax
HEXFET(R) Power MOSFET
D
IRFZ44Z IRFZ44ZS IRFZ44ZL
VDSS = 55V
Description
Specifically designed for Automotive applications, this HEXFET(R) Power MOSFET utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this design are a 175C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features combine to make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
G S
RDS(on) = 13.9m ID = 51A
TO-220AB IRFZ44Z
D2Pak IRFZ44ZS
TO-262 IRFZ44ZL
Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS EAS (tested) IAR EAR TJ TSTG Continuous Drain Current, VGS @ 10V (Silicon Limited) Continuous Drain Current, VGS @ 10V (See Fig. 9) Pulsed Drain Current
Max.
51 36 200 80 0.53 20 86 105 See Fig.12a,12b,15,16 -55 to + 175 300 (1.6mm from case ) 10 lbf*in (1.1N*m)
Units
A
c
Maximum Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy (Thermally Limited) Single Pulse Avalanche Energy Tested Value Avalanche Current
W W/C V mJ A mJ C
c
i
d
Repetitive Avalanche Energy Operating Junction and Storage Temperature Range
h
Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw
Thermal Resistance
Parameter
RJC RCS RJA RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient (PCB Mount, steady state)j
Typ.
--- 0.50 --- ---
Max.
1.87 --- 62 40
Units
C/W
HEXFET(R) is a registered trademark of International Rectifier.
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1
10/8/03
IRFZ44Z/S/L
Static @ TJ = 25C (unless otherwise specified)
Parameter
V(BR)DSS VDSS/TJ RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff. Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. Typ. Max. Units
55 --- --- 2.0 22 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- 0.054 --- 11.1 13.9 --- 4.0 --- --- --- 20 --- 250 --- 200 --- -200 29 43 7.2 11 12 18 14 --- 68 --- 33 --- 41 --- 4.5 --- 7.5 1420 240 130 830 190 300 --- --- --- --- --- --- --- pF V V/C m V S A nA nC
Conditions
VGS = 0V, ID = 250A Reference to 25C, ID = 1mA VGS = 10V, ID = 31A VDS = VGS, ID = 250A VDS = 25V, ID = 31A VDS = 55V, VGS = 0V VDS = 55V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V ID = 31A VDS = 44V VGS = 10V VDD = 28V ID = 31A RG = 15 VGS = 10V Between lead, D
f
ns
f f
nH
6mm (0.25in.) from package
G
and center of die contact S VGS = 0V VDS = 25V = 1.0MHz, See Fig. 5 VGS = 0V, VDS = 1.0V, = 1.0MHz VGS = 0V, VDS = 44V, = 1.0MHz VGS = 0V, VDS = 0V to 44V
Diode Characteristics
Parameter
IS ISM VSD trr Qrr ton Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode)A Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
--- --- --- --- --- --- --- --- 23 17 51 A 200 1.2 35 26 V ns nC
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. G TJ = 25C, IS = 31A, VGS = 0V TJ = 25C, IF = 31A, VDD = 28V di/dt = 100A/s
D
f
S
f
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes: Repetitive rating; pulse width limited by max. junction temperature. (See fig. 11). Limited by TJmax, starting TJ = 25C, L =0.18mH, RG = 25, IAS = 31A, VGS =10V. Part not recommended for use above this value. ISD 31A, di/dt 840A/s, VDD V(BR)DSS, TJ 175C. Pulse width 1.0ms; duty cycle 2%.
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. R is rated at TJ of approximately 90C.
2
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IRFZ44Z/S/L
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
1000
TOP VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V 4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
10
4.5V
4.5V 1 0.1 1
60s PULSE WIDTH
Tj = 25C 10 1 100 0.1 1
60s PULSE WIDTH
Tj = 175C 10 100
V DS, Drain-to-Source Voltage (V)
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
60
Gfs, Forward Transconductance (S)
ID, Drain-to-Source Current ()
50 40 30 20 10
T J = 25C
100
TJ = 175C 10 T J = 25C
TJ = 175C
1.0 2 4 6
VDS = 15V 60s PULSE WIDTH 8 10 12
V DS = 10V 0 0 10 20 30 40 50 ID,Drain-to-Source Current (A)
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance vs. Drain Current
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3
IRFZ44Z/S/L
10000
C oss = C ds + C gd
VGS, Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ C iss = C gs + C gd, C ds SHORTED C rss = C gd
12.0 ID= 31A 10.0 8.0 6.0 4.0 2.0 0.0 VDS= 44V VDS= 28V VDS= 11V
C, Capacitance(pF)
Ciss
1000
Coss Crss
100 1 10 100
0
5
10
15
20
25
30
VDS, Drain-to-Source Voltage (V)
QG Total Gate Charge (nC)
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
1000
1000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100 T J = 175C 10
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
10
100sec
1
T J = 25C
0.10 VGS = 0V 0.0 0.5 1.0 1.5 2.0
1 Tc = 25C Tj = 175C Single Pulse 0.1 1 10
1msec 10msec
0.01
100
1000
VSD, Source-to-Drain Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFZ44Z/S/L
55 50 45
ID, Drain Current (A)
2.5
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 31A VGS = 10V
2.0
40 35 30 25 20 15 10 5 0 25 50 75 100 125 150 175 T C , Case Temperature (C)
1.5
1.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160 180
T J , Junction Temperature (C)
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 10. Normalized On-Resistance vs. Temperature
10
Thermal Response ( Z thJC )
1
D = 0.50 0.20
R1 R1 J 1 2 R2 R2 R3 R3 3 C 3
0.1
0.10 0.05 0.02 0.01
J
Ri (C/W) i (sec) 0.8487 0.00044 0.6254 0.3974 0.00221 0.01173
1
2
Ci= i/Ri Ci i/Ri
0.01
SINGLE PULSE ( THERMAL RESPONSE )
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthjc + Tc
0.001 0.01 0.1 1
0.001 1E-006 1E-005 0.0001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFZ44Z/S/L
15V
400
EAS , Single Pulse Avalanche Energy (mJ)
350 300 250 200 150 100 50 0 25 50 75 100
VDS
L
DRIVER
ID TOP 3.8A 5.5A BOTTOM 31A
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
125
150
175
Starting T J , Junction Temperature (C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy vs. Drain Current
10 V
QGS VG QGD
4.0
VGS(th) Gate threshold Voltage (V)
ID = 250A
3.0
Charge
Fig 13a. Basic Gate Charge Waveform
2.0
L
0
DUT 1K
VCC
1.0 -75 -50 -25 0 25 50 75 100 125 150 175 200
T J , Temperature ( C )
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRFZ44Z/S/L
100
Duty Cycle = Single Pulse
Avalanche Current (A)
10
0.01 0.05 0.10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
1
0.1 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
100
EAR , Avalanche Energy (mJ)
80
TOP Single Pulse BOTTOM 1% Duty Cycle ID = 31A
60
40
20
0 25 50 75 100 125 150 175
Starting T J , Junction Temperature (C)
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). tav = Average time in avalanche. D = Duty cycle in avalanche = tav *f ZthJC(D, tav ) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Fig 16. Maximum Avalanche Energy vs. Temperature
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7
IRFZ44Z/S/L
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test
V DD
VDD
+ -
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET(R) Power MOSFETs
V DS VGS RG 10V
Pulse Width 1 s Duty Factor 0.1 %
RD
D.U.T.
+
-VDD
Fig 18a. Switching Time Test Circuit
VDS 90%
10% VGS
td(on) tr t d(off) tf
Fig 18b. Switching Time Waveforms
8
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IRFZ44Z/S/L
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
2.87 (.113) 2.62 (.103) 10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240) -B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS 1 - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN
14.09 (.555) 13.47 (.530)
4.06 (.160) 3.55 (.140)
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S EMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DAT E CODE YEAR 7 = 1997 WEEK 19 LINE C
For GB Production
EXAMPLE: THIS IS AN IRF1010 LOT CODE 1789 AS S EMBLED ON WW 19, 1997 IN THE AS S E MBLY LINE "C" INTERNATIONAL RECTIFIER LOGO LOT CODE PART NUMBER
DATE CODE
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9
IRFZ44Z/S/L
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L" INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER F 530S DAT E CODE YEAR 0 = 2000 WEEK 02 LINE L
For GB Production T HIS IS AN IRF530S WIT H LOT CODE 8024 ASS EMBLED ON WW 02, 2000 IN T HE ASS EMBLY LINE "L"
INT ERNAT IONAL RECT IFIER LOGO LOT CODE
PART NUMBER F 530S DAT E CODE
10
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IRFZ44Z/S/L
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 ASS EMBLED ON WW 19, 1997 IN THE ASS EMBLY LINE "C" INT ERNATIONAL RECTIFIER LOGO AS SEMBLY LOT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
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11
IRFZ44Z/S/L
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
30.40 (1.197) MAX.
26.40 (1.039) 24.40 (.961) 3
4
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 10/03
12
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